1. Field of the Invention
The present invention relates to a semiconductor device including a lateral field effect transistor.
2. Background Art
For an N-type LDMOS (Laterally Diffused Metal Oxide Semiconductor Field Effect Transistor) used as a high-side transistor of a DC-DC converter, technology is known that forms an N-type LDMOS inside a deep N well (DNW) by forming a DNW in a P-type semiconductor substrate, forming a P well in an upper layer portion of the DNW, and forming an N-type source layer and drain layer inside the P well (for example, JP-A 2006-245482 (Kokai)). Thus, the entire LDMOS is surrounded by the DNW, and the LDMOS can be electrically separated from the semiconductor substrate.
Normally, however, the DNW is replaced by a buried N+ layer, and the well formation region is made by an epitaxial growth method. Forming the DNW as recited above by implantation and diffusion results in a lower impurity concentration than that of a buried N+ layer, and the resistivity undesirably increases.
Accordingly, when increasing the surface area of an N-type LDMOS such as by alternately arranging source layers and drain layers, the DNW has a high resistance resulting in undesirable variation of the DNW potential by position. Therefore, it is difficult to obtain uniform characteristics in a device having a large surface area.